Dear contributor, Our automatic CI successfully passed with your patch(es). Please find some details below. In tcwg_aosp-code_size-surfaceflinger/oriole-master, after: | 367 commits in llvm | d9dfe7540f81 MCNopsFragment,MCBoundaryAlignFragment: Use parent MCSubtargetInfo | fbf74b2553de AMDGPU: Select vector reg class for divergent build_vector (#168169) | 9fecebf97bef AMDGPU: Consider isVGPRImm when forming constant from build_vector (#168168) | d8f6e108da56 AMDGPU: Use vgpr to implement divergent i32->i64 anyext (#168167) | f8d65fd874ca [AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554) | ... and 362 more commits in llvm Produces Success: | Results changed to | # reset_artifacts: | -10 | # build_aosp_toolchain: | -3 | # build_shadow_llvm: | -2 | # build_aosp: | -1 | # shadow build has no errors | 0 | # shadow.size present | 1 | | From | # reset_artifacts: | -10 | # build_aosp_toolchain: | -3 | # build_shadow_llvm: | -2 | # build_aosp: | -1 | # shadow build has no errors | 0 | # shadow.size present | 1 Used configuration : tcwg_aosp-code_size-surfaceflinger/oriole-master If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list. -----------------8<--------------------------8<--------------------------8<-------------------------- The information below contains the details of the failures, and the ways to reproduce a debug environment: Current build : https://ci.linaro.org/job/tcwg_aosp-code_size-surfaceflinger--oriole-master-build/1610/artifact/artifacts Reference build : https://ci.linaro.org/job/tcwg_aosp-code_size-surfaceflinger--oriole-master-build/1608/artifact/artifacts