Dear contributor, Our automatic CI successfully passed with your patch(es). Please find some details below. In tcwg_bmk-code_vect-cpu2017fast/llvm-aarch64-master-O3, after: | 737 commits in llvm | dfd3935e4ff7 AMDGPU/GlobalISel: Add regbanklegalize rules for uniform global loads (#145909) | 72df5464eda2 [libc][math] Remove constexpr from bfloat16 comparison operations (#150227) | c11303609020 [Flang] Fix a crash when equivalence and namelist statements are used (#150081) | 8fff238b2c36 [mlir][NFC] update `mlir/Dialect` create APIs (23/n) (#149930) | fc0a97832721 [Flang] Fix ASSIGN statement (#149941) | ... and 732 more commits in llvm Produces No change: | No change Used configuration : Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI. Configuration: - Benchmark: SPEC CPU2017 - Toolchain: Clang + Glibc + LLVM Linker - Version: all components were built from their tip of trunk - Target: aarch64-linux-gnu - Compiler flags: O3 - Hardware: This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain@lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports. If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list. -----------------8<--------------------------8<--------------------------8<-------------------------- The information below contains the details of the failures, and the ways to reproduce a debug environment: Current build : https://ci.linaro.org/job/tcwg_bmk-code_vect-cpu2017fast--llvm-aarch64-master-O3-build/322/artifact/artifacts Reference build : https://ci.linaro.org/job/tcwg_bmk-code_vect-cpu2017fast--llvm-aarch64-master-O3-build/320/artifact/artifacts