Dear contributor, Our automatic CI successfully passed with your patch(es). Please find some details below. In bootstrap_build master-aarch64-bootstrap_profiled_lto_lean, after: | 50 commits in gcc | d4e6fc510f90 RISC-V: Fix overflow check in interleave pattern [PR122970]. | 23a2cab0e68e RISC-V: Testsuite fixes. | 92edf176fff1 RISC-V: Generic vec_extract via subreg. | f5ddd4ba0ba1 RISC-V: Add VLS modes to autovec iterators. | dd781e4c1cbf RISC-V: Rename vector-mode related functions. | ... and 45 more commits in gcc Produces Success: | Results changed to | # reset_artifacts: | -10 | # true: | 0 | # build_abe bootstrap_profiled_lto_lean: | 1 | | From | # reset_artifacts: | -10 | # true: | 0 | # build_abe bootstrap_profiled_lto_lean: | 1 Used configuration : *CI config* tcwg_bootstrap_build master-aarch64-bootstrap_profiled_lto_lean *configure and test flags:* none, autodetected on aarch64-unknown-linux-gnu If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list. -----------------8<--------------------------8<--------------------------8<-------------------------- The information below contains the details of the failures, and the ways to reproduce a debug environment: You can find the failure logs in * https://ci.linaro.org/job/tcwg_bootstrap_build--master-aarch64-bootstrap_profiled_lto_lean-build/1023/artifact/artifacts/ The full lists of regressions and improvements as well as configure and make commands are in * https://ci.linaro.org/job/tcwg_bootstrap_build--master-aarch64-bootstrap_profiled_lto_lean-build/1023/artifact/artifacts/notify/ Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-aarch64-bootstrap_profiled_lto_lean-build/1023/artifact/artifacts Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-aarch64-bootstrap_profiled_lto_lean-build/1022/artifact/artifacts