Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In bootstrap_build master-arm-bootstrap_profiled_lto, after:
  | 23 commits in gcc
  | ab6621a77fbc ifcvt: Reject inner floating modes of a subreg for noce_try_cond_zero_arith [PR123491]
  | 07df546fb904 libiberty/testsuite: make test-pexecute's -t option a little more useful
  | 4fbc0bbc0316 [PR target/121778] Improving rotation detection
  | 8265192910c8 [RISC-V] Clamp long reservations to 7c
  | 83b3c80fac33 [Bug gcov-profile/123019][V3] Fix Virtual SSA ICE
  | ... and 18 more commits in gcc

Produces Success:
  | Results changed to
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe bootstrap_profiled_lto:
  | 1
  | 
  | From
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe bootstrap_profiled_lto:
  | # FAILED

Used configuration :
 *CI config* tcwg_bootstrap_build master-arm-bootstrap_profiled_lto
 *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

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The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in
 * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/1039/artifact/artifacts/
The full lists of regressions and improvements as well as configure and make commands are in
 * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/1039/artifact/artifacts/notify/

Current build   : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/1039/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/1038/artifact/artifacts