Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In bootstrap_build master-arm-bootstrap_profiled_lto, after:
  | 24 commits in gcc
  | 93af5f69d159 AVR: ad target/121794 - Invoke zero_reg less.
  | cd404684a966 libphobos: enable for powerpc64le-linux-gnu
  | 409a3c2a35c7 RISC-V: Add test for vec_duplicate + vnmsub.vv unsigned combine with GR2VR cost 0, 1 and 15
  | 85ff9207c46d RISC-V: Add test for vec_duplicate + vnmsub.vv signed combine with GR2VR cost 0, 1 and 15
  | 7c2c5ac9c7b0 RISC-V: Combine vec_duplicate + vnmsub.vv to vnmsub.vx on GR2VR cost
  | ... and 19 more commits in gcc

Produces Success:
  | Results changed to
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe bootstrap_profiled_lto:
  | # FAILED
  | 
  | From
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe bootstrap_profiled_lto:
  | # FAILED

Used configuration :
 *CI config* tcwg_bootstrap_build master-arm-bootstrap_profiled_lto
 *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

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The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in
 * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/926/artifact/artifacts/
The full lists of regressions and improvements as well as configure and make commands are in
 * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/926/artifact/artifacts/notify/

Current build   : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/926/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/925/artifact/artifacts