Dear contributor, Our automatic CI successfully passed with your patch(es). Please find some details below. In bootstrap_build master-arm-bootstrap_profiled_lto, after: | 16 commits in gcc | a52888dc7192 testsuite: arm: [MVE] Relax expected code for vbicq_f [PR122223] | 7821a827ab87 Support reduc_sbool_and_scal_m for V{QI,SI,DI}mode. | 87b2de785ab1 Support reduc_sbool_{and,ior,xor}_scal_m for avx512 kmask. | ccafcb3fb845 Daily bump. | f4f3cdf6516d x86: Use HOST_WIDE_INT_(0|M1)U to initialize unsigned HOST_WIDE_INT | ... and 11 more commits in gcc Produces Success: | Results changed to | # reset_artifacts: | -10 | # true: | 0 | # build_abe bootstrap_profiled_lto: | # FAILED | | From | # reset_artifacts: | -10 | # true: | 0 | # build_abe bootstrap_profiled_lto: | # FAILED Used configuration : *CI config* tcwg_bootstrap_build master-arm-bootstrap_profiled_lto *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list. -----------------8<--------------------------8<--------------------------8<-------------------------- The information below contains the details of the failures, and the ways to reproduce a debug environment: You can find the failure logs in * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/962/artifact/artifacts/ The full lists of regressions and improvements as well as configure and make commands are in * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/962/artifact/artifacts/notify/ Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/962/artifact/artifacts Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/961/artifact/artifacts