Dear contributor, Our automatic CI successfully passed with your patch(es). Please find some details below. In bootstrap_build master-arm-bootstrap_profiled_lto, after: | 34 commits in gcc | f6b6430085e LoongArch: NFC: Drop loongarch_expand_vec_perm | 53194a7bb0b LoongArch: NFC: Simplify logic of vec_perm{v32qi,v16hi} | 6641aaa9ad5 LoongArch: Micro-optimize the blend step for vec_perm | af26139fd05 LoongArch: NFC: Move [x]vshuf.* to simd.md | 57b4620e7a1 LoongArch: NFC: Simplify vec_permv8sf logic | ... and 29 more commits in gcc Produces Success: | Results changed to | # reset_artifacts: | -10 | # true: | 0 | # build_abe bootstrap_profiled_lto: | # FAILED | | From | # reset_artifacts: | -10 | # true: | 0 | # build_abe bootstrap_profiled_lto: | # FAILED Used configuration : *CI config* tcwg_bootstrap_build master-arm-bootstrap_profiled_lto *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list. -----------------8<--------------------------8<--------------------------8<-------------------------- The information below contains the details of the failures, and the ways to reproduce a debug environment: You can find the failure logs in * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/986/artifact/artifacts/ The full lists of regressions and improvements as well as configure and make commands are in * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/986/artifact/artifacts/notify/ Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/986/artifact/artifacts Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_profiled_lto-build/985/artifact/artifacts