Dear contributor, Our automatic CI successfully passed with your patch(es). Please find some details below. In bootstrap_build master-arm-bootstrap_ubsan, after: | 33 commits in gcc | 86353186dc2 Fortran: Check PDT parameters are of integer type [PR83762, PR102457] | e4755f9523e Daily bump. | d6f31c8d579 RISC-V: Add test for vec_duplicate + vmadd.vv unsigned combine with GR2VR cost 0, 1 and 15 | 0f65bb76534 RISC-V: Add test for vec_duplicate + vmadd.vv signed combine with GR2VR cost 0, 1 and 15 | 927ba84ec20 RISC-V: Adjust the vmacc.vx combine test cases | ... and 28 more commits in gcc Produces Success: | Results changed to | # reset_artifacts: | -10 | # true: | 0 | # build_abe bootstrap_ubsan: | 1 | | From | # reset_artifacts: | -10 | # true: | 0 | # build_abe bootstrap_ubsan: | 1 Used configuration : *CI config* tcwg_bootstrap_build master-arm-bootstrap_ubsan *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list. -----------------8<--------------------------8<--------------------------8<-------------------------- The information below contains the details of the failures, and the ways to reproduce a debug environment: You can find the failure logs in * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_ubsan-build/910/artifact/artifacts/ The full lists of regressions and improvements as well as configure and make commands are in * https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_ubsan-build/910/artifact/artifacts/notify/ Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_ubsan-build/910/artifact/artifacts Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_ubsan-build/909/artifact/artifacts