Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In gcc_build master-aarch64, after:
  | 39 commits in gcc
  | d4e6fc510f9 RISC-V: Fix overflow check in interleave pattern [PR122970].
  | 23a2cab0e68 RISC-V: Testsuite fixes.
  | 92edf176fff RISC-V: Generic vec_extract via subreg.
  | f5ddd4ba0ba RISC-V: Add VLS modes to autovec iterators.
  | dd781e4c1cb RISC-V: Rename vector-mode related functions.
  | ... and 34 more commits in gcc

Produces Success:
  | Results changed to
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe gcc:
  | 1
  | 
  | From
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe gcc:
  | 1

Used configuration :
 *CI config* tcwg_gcc_build master-aarch64
 *configure and test flags:* none, autodetected on aarch64-unknown-linux-gnu

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

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The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in
 * https://ci.linaro.org/job/tcwg_gcc_build--master-aarch64-build/4172/artifact/artifacts/
The full lists of regressions and improvements as well as configure and make commands are in
 * https://ci.linaro.org/job/tcwg_gcc_build--master-aarch64-build/4172/artifact/artifacts/notify/

Current build   : https://ci.linaro.org/job/tcwg_gcc_build--master-aarch64-build/4172/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_gcc_build--master-aarch64-build/4171/artifact/artifacts