Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In gcc_build master-arm, after:
  | 23 commits in gcc
  | 79b8f23a709 [PATCH v3] RISC-V: Implement RISC-V profile macro support
  | b4d6b335696 Daily bump.
  | 42028a9d8b1 libcpp: decode original directory strings for traditional CPP
  | be496fd2aa5 libcpp: decode original directory strings for traditional CPP
  | 304d7359a67 [RISC-V][PR target/120811] Improving address reloads in LRA
  | ... and 18 more commits in gcc

Produces Success:
  | Results changed to
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe gcc:
  | 1
  | 
  | From
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe gcc:
  | 1

Used configuration :
 *CI config* tcwg_gcc_build master-arm
 *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

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The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in
 * https://ci.linaro.org/job/tcwg_gcc_build--master-arm-build/4027/artifact/artifacts/
The full lists of regressions and improvements as well as configure and make commands are in
 * https://ci.linaro.org/job/tcwg_gcc_build--master-arm-build/4027/artifact/artifacts/notify/

Current build   : https://ci.linaro.org/job/tcwg_gcc_build--master-arm-build/4027/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_gcc_build--master-arm-build/4026/artifact/artifacts