Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In gcc_build master-arm, after:
  | 3 commits in gcc
  | 6cae8aac082b Daily bump.
  | c1742f10c071 hppa: Break out large REG+D addresses from MEM operands
  | 5fd09b47d9a7 [PATCH] RISC-V: Make vlsegff similar to vleff [PR122656].

Produces Success:
  | Results changed to
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe gcc:
  | 1
  | 
  | From
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe gcc:
  | 1

Used configuration :
 *CI config* tcwg_gcc_build master-arm
 *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

-----------------8<--------------------------8<--------------------------8<--------------------------

The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in
 * https://ci.linaro.org/job/tcwg_gcc_build--master-arm-build/4187/artifact/artifacts/
The full lists of regressions and improvements as well as configure and make commands are in
 * https://ci.linaro.org/job/tcwg_gcc_build--master-arm-build/4187/artifact/artifacts/notify/

Current build   : https://ci.linaro.org/job/tcwg_gcc_build--master-arm-build/4187/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_gcc_build--master-arm-build/4186/artifact/artifacts