Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In  master-arm, after:
  | 57 commits in binutils,gcc,linux,glibc,gdb,qemu
  | 6193dd2f7cc Fix Ada 'Modulus attribute
  | 1d05a2adc28 Add variable styling to "finish" output
  | 43d523e2076 aarch64: Add support for POE2 PLBI instruction
  | 859d7ccd9f9 aarch64: Add support for TEV instructions
  | 6b49147ddb9 aarch64: Add support for POE2 system registers
  | ... and 8 more commits in binutils
  | 0c3d8dd92811 [RISC-V] Restore inline expansion of block moves on RISC-V in some cases
  | 91ee2e628475 [PATCH v1 2/2] RISC-V: Add run test case for vwadd/vwsub wx mis combine [PR123317]
  | 2dbf9c0feca3 [PATCH v1 1/2] RISC-V: Fix incorrect combine pattern for any_extend [PR123317]
  | 340e971f0ed6 aarch64: Restrict SME_LUTv2 instructions to streaming mode
  | 201324b6e99f aarch64 doc: Fix incorrect function name
  | ... and 8 more commits in gcc
  | 3609fa95fb0f2 Merge tag 'devicetree-fixes-for-6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
  | 9ace4753a5202 Linux 6.19-rc4
  | 235a1eb8d2dcc of: unittest: Fix memory leak in unittest_data_add()
  | 4f4f6b4467e63 MAINTAINERS: Update Saravana Kannan's email address
  | 755798985d0 aarch64: Fix PT_GNU_PROPERTY checks for static exe (BZ 33713)
  | 063d6815f3e tst-sig-redzone: Decorate assembly function
  | d942f309e3a hurd: check that signal processing does not hurt the x86_64 redzone
  | d451f10806d libsframe: add README and mention expectations
  | 6193dd2f7cc Fix Ada 'Modulus attribute
  | 1d05a2adc28 Add variable styling to "finish" output
  | 43d523e2076 aarch64: Add support for POE2 PLBI instruction
  | 859d7ccd9f9 aarch64: Add support for TEV instructions
  | ... and 9 more commits in gdb
  | 159107e390 Merge tag 'pull-hex-20260102' of https://github.com/quic/qemu into staging
  | 15722c774a Hexagon (target/hexagon) s/log_write/gen_write
  | 19366c95f0 Hexagon (target/hexagon) s/gen_log_vreg_write/gen_vreg_write
  | b68bcbf6ea Hexagon (target/hexagon) s/gen_log_pred_write/gen_pred_write
  | c3d9f1b84b Hexagon (target/hexagon) Remove gen_log_reg_write
  | ... and 5 more commits in qemu


Used configuration :
 *CI config* tcwg_gnu_cross_check_binutils master-arm
 *configure and test flags:* --target arm-linux-gnueabihf 

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

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The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in *.log.1.xz files in
 * https://ci.linaro.org/job/tcwg_gnu_cross_check_binutils--master-arm-build/1266/artifact/artifacts/00-sumfiles/
The full lists of regressions and improvements as well as configure and make commands are in
 * https://ci.linaro.org/job/tcwg_gnu_cross_check_binutils--master-arm-build/1266/artifact/artifacts/notify/
The list of [ignored] baseline and flaky failures are in
 * https://ci.linaro.org/job/tcwg_gnu_cross_check_binutils--master-arm-build/1266/artifact/artifacts/sumfiles/xfails.xfail

Current build   : https://ci.linaro.org/job/tcwg_gnu_cross_check_binutils--master-arm-build/1266/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_gnu_cross_check_binutils--master-arm-build/1265/artifact/artifacts