diff --git a/notify/mail-body.txt b/notify/mail-body.txt
index 70f7825..eab245e 100644
--- a/notify/mail-body.txt
+++ b/notify/mail-body.txt
@@ -10,11 +10,11 @@ In  arm-eabi cortex-m0 soft, after:
   | 06b8b0ad976 gdb/testsuite: some cleanups in gdb.base/annota{1,3}.exp tests
   | 26885b2b6ca gdb/testsuite: fix duplicate test names in gdb.trace/
   | ... and 40 more commits in binutils
-  | 9b2915d95d85 aarch64: Optimise calls to ldexp with SVE FSCALE instruction [PR111733]
-  | 445d8bb6a89e RISC-V: Bugfix for max_sew_overlap_and_next_ratio_valid_for_prev_sew_p[pr117483]
-  | eeb5c6acf719 [RISC-V] Fix costing of LO_SUM expressions
-  | 10d76b7f1e5b Reapply "[PATCH v2] RISC-V: zero_extend(not) -> xor optimization [PR112398]"
-  | 2272cd2508f1 i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418]
+  | 9b2915d95d8 aarch64: Optimise calls to ldexp with SVE FSCALE instruction [PR111733]
+  | 445d8bb6a89 RISC-V: Bugfix for max_sew_overlap_and_next_ratio_valid_for_prev_sew_p[pr117483]
+  | eeb5c6acf71 [RISC-V] Fix costing of LO_SUM expressions
+  | 10d76b7f1e5 Reapply "[PATCH v2] RISC-V: zero_extend(not) -> xor optimization [PR112398]"
+  | 2272cd2508f i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418]
   | ... and 116 more commits in gcc
   | 1e8c92e21d Cygwin: Change pthread_sigqueue() to accept thread id
   | 87cd4f3fbd Cygwin: console Add comment for the recent change
diff --git a/notify/results.compare.txt b/notify/results.compare.txt
index d9546ce..4f34f38 100644
--- a/notify/results.compare.txt
+++ b/notify/results.compare.txt
@@ -7,8 +7,8 @@ binutils.sum
 gas.sum
 ld.sum
 Comparing:
-REFERENCE:/tmp/gxx-sum1.25307
-CURRENT:  /tmp/gxx-sum2.25307
+REFERENCE:/tmp/gxx-sum1.20254
+CURRENT:  /tmp/gxx-sum2.20254
 
                                              +---------+---------+
 o  RUN STATUS:                               |   REF   |   RES   |