diff --git a/notify/mail-body.txt b/notify/mail-body.txt
index b9c7dffc7..7ec5464f1 100644
--- a/notify/mail-body.txt
+++ b/notify/mail-body.txt
@@ -1,6 +1,6 @@
 Dear contributor,
 
-Our automatic CI has detected problems related to your patch(es). Please find some details below.
+Our automatic CI successfully passed with your patch(es). Please find some details below.
 
 In tcwg_kernel/gnu-master-arm-stable-allmodconfig, after:
   | 260 commits in binutils,gcc,qemu
@@ -10,11 +10,11 @@ In tcwg_kernel/gnu-master-arm-stable-allmodconfig, after:
   | 2cd1fe36271 small coffgen.c tidy
   | d2cca359603 objdump: Delete close optimisation
   | ... and 47 more commits in binutils
-  | 6a5a1b8175e0 AArch64: Set L1 data cache size according to size on CPUs
-  | 4a9427f75b9f AArch64: Add CMP+CSEL and CMP+CSET for cores that support it
-  | 99b9dfaff66c i386: Add vec_fm{addsub,subadd}v2sf4 patterns [PR116979]
-  | 12a5ab146110 RISC-V: Improve slide1up pattern.
-  | 528567a7b158 RISC-V: Add even/odd vec_perm_const pattern.
+  | 6a5a1b8175e AArch64: Set L1 data cache size according to size on CPUs
+  | 4a9427f75b9 AArch64: Add CMP+CSEL and CMP+CSET for cores that support it
+  | 99b9dfaff66 i386: Add vec_fm{addsub,subadd}v2sf4 patterns [PR116979]
+  | 12a5ab14611 RISC-V: Improve slide1up pattern.
+  | 528567a7b15 RISC-V: Add even/odd vec_perm_const pattern.
   | ... and 174 more commits in gcc
   | a5ba0a7e4e1 Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging
   | b5e3f63a4a7 Merge tag 'pull-9p-20241210' of https://github.com/cschoenebeck/qemu into staging