diff --git a/notify/mail-body.txt b/notify/mail-body.txt
index 6e7b64b6..fdada988 100644
--- a/notify/mail-body.txt
+++ b/notify/mail-body.txt
@@ -1,6 +1,6 @@
 Dear contributor,
 
-Our automatic CI has detected problems related to your patch(es). Please find some details below.
+Our automatic CI successfully passed with your patch(es). Please find some details below.
 
 In tcwg_kernel/llvm-master-aarch64-stable-allnoconfig, after:
   | 448 commits in binutils,llvm,qemu
@@ -16,11 +16,11 @@ In tcwg_kernel/llvm-master-aarch64-stable-allnoconfig, after:
   | 6aeffcdb9130 [TableGen] Add a backend generating SDNode descriptions (#123002)
   | 382bafc9579f [ORC][MachO] Prepare MachOPlatform for compact-unwind support.
   | ... and 357 more commits in llvm
-  | d6430c17d71 Merge tag 'pull-riscv-to-apply-20250119-1' of https://github.com/alistair23/qemu into staging
-  | f04cac4f8f2 hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events
-  | 941f76e2930 target/riscv: Support Supm and Sspm as part of Zjpm v1.0
-  | fa622855eaa hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache
-  | 2d8e8259287 target/riscv: Add Smdbltrp ISA extension enable switch
+  | d6430c17d7 Merge tag 'pull-riscv-to-apply-20250119-1' of https://github.com/alistair23/qemu into staging
+  | f04cac4f8f hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events
+  | 941f76e293 target/riscv: Support Supm and Sspm as part of Zjpm v1.0
+  | fa622855ea hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache
+  | 2d8e825928 target/riscv: Add Smdbltrp ISA extension enable switch
   | ... and 52 more commits in qemu
 
 Produces Success: