diff --git a/notify/mail-body.txt b/notify/mail-body.txt
index ee111e214..36ffc0dbd 100644
--- a/notify/mail-body.txt
+++ b/notify/mail-body.txt
@@ -1,6 +1,6 @@
 Dear contributor,
 
-Our automatic CI has detected problems related to your patch(es). Please find some details below.
+Our automatic CI successfully passed with your patch(es). Please find some details below.
 
 In tcwg_kernel/llvm-master-aarch64-stable-allyesconfig, after:
   | 816 commits in binutils,llvm,linux,qemu
@@ -16,17 +16,17 @@ In tcwg_kernel/llvm-master-aarch64-stable-allyesconfig, after:
   | d35d7f4b13c0 [Github] Add Agent Container Image (#123486)
   | e68d18c34e3e [Github] Add Zlib at build time to CI container (#123489)
   | ... and 354 more commits in llvm
-  | eca3825627941 Merge v6.12.10
-  | a6ad5510dbb5f Linux 6.12.10
-  | b683ba0df11ff netdev: prevent accessing NAPI instances from another namespace
-  | c08d7fcce7cc0 iio: imu: inv_icm42600: fix spi burst write not supported
-  | 476e4c4a1a859 io_uring: don't touch sqd->thread off tw add
+  | eca382562794 Merge v6.12.10
+  | a6ad5510dbb5 Linux 6.12.10
+  | b683ba0df11f netdev: prevent accessing NAPI instances from another namespace
+  | c08d7fcce7cc iio: imu: inv_icm42600: fix spi burst write not supported
+  | 476e4c4a1a85 io_uring: don't touch sqd->thread off tw add
   | ... and 182 more commits in linux
-  | d6430c17d71 Merge tag 'pull-riscv-to-apply-20250119-1' of https://github.com/alistair23/qemu into staging
-  | f04cac4f8f2 hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events
-  | 941f76e2930 target/riscv: Support Supm and Sspm as part of Zjpm v1.0
-  | fa622855eaa hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache
-  | 2d8e8259287 target/riscv: Add Smdbltrp ISA extension enable switch
+  | d6430c17d7 Merge tag 'pull-riscv-to-apply-20250119-1' of https://github.com/alistair23/qemu into staging
+  | f04cac4f8f hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events
+  | 941f76e293 target/riscv: Support Supm and Sspm as part of Zjpm v1.0
+  | fa622855ea hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache
+  | 2d8e825928 target/riscv: Add Smdbltrp ISA extension enable switch
   | ... and 197 more commits in qemu
 
 Produces Success: